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The time now is 2010/3/10 2:20
You last visited: 2010/3/10 2:19:40
Total Topics: 387 | Total Posts: 1118
You last visited: 2010/3/10 2:19:40
Total Topics: 387 | Total Posts: 1118
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EDA Tools |
| Forum | Topics | Posts | Last Post | |
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Magic
(RSS)
Talk about the Layout Editor Magic Moderator: jgrad jamesstine |
8 | 14 | 2/9 9:27:20  Leandro |
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Cadence
(RSS)
A forum to discuss issues with any of the tools by Cadence Design Systems Moderator: jamesstine jgrad |
223 | 731 | 3/2 11:50:18  MohEllayal |
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Synopsys
(RSS)
A forum to discuss any of the tools by Synopsys Moderator: jamesstine jgrad |
20 | 59 | 2008/5/30 2:29 mrityunjay |
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Irsim
(RSS)
Discuss here any issues with the freeware switch-level simulator Irsim Moderator: jamesstine jgrad |
2 | 4 | 2005/10/3 1:06 dinesh |
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Sue
(RSS)
Discuss here the freeware schematic editor Sue, formerly a tool sold my Micromagic. Moderator: jamesstine jgrad |
2 | 3 | 2005/11/15 13:36 jgrad |
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Gemini
(RSS)
Discussion board for the freeware LVS tool gemini Moderator: jamesstine jgrad |
1 | 1 | 2005/8/7 18:31  jgrad |
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NCSU CDK
(RSS)
Discussion board for the NCSU CDK, which provides MOSIS SCMOS rules for Cadence Virtuoso. Moderator: jamesstine jgrad |
56 | 145 | 1/27 18:38:13 kochungt |
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Commercial PDK
(RSS)
Discuss here any issues with commercial PDKs Moderator: jamesstine jgrad |
4 | 4 | 2009/8/6 13:03 mmajzoobi |
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General Discussions |
| Forum | Topics | Posts | Last Post | |
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EDA Industry
(RSS)
A forum to discuss the EDA industry in general Moderator: jamesstine jgrad |
8 | 9 | 2009/8/3 5:09 pPawlicki |
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Chiptalk.org
(RSS)
A forum to discuss this website and propose improvements Moderator: jamesstine jgrad |
11 | 17 | 2008/5/14 3:42 jojolucky |
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Meet And Greet
(RSS)
Meet and greet for Chiptalk.org members. Get to know your colleagues... Moderator: jamesstine jgrad |
4 | 18 | 2008/1/29 5:28 BrenBP |
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Unix Users
(RSS)
Unix users tips, questions and solutions |
2 | 2 | 2005/11/16 8:25 jgrad |
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Cell Libraries |
| Forum | Topics | Posts | Last Post | |
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OSU Cell Library
(RSS)
A forum to discuss any issues with the OSU cell library (formerly the IIT cell library) Moderator: jamesstine jgrad |
31 | 88 | 2008/10/7 14:41 McKinzey |
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Commercial libraries
(RSS)
A forum to discuss commercial standard cell libraries Moderator: jamesstine jgrad |
2 | 3 | 2007/6/13 3:01 jamesstine |
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Chip Design |
| Forum | Topics | Posts | Last Post | |
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Verilog
(RSS)
Discussion board for general Verilog code questions Moderator: jamesstine jgrad |
1 | 1 | 2005/8/7 18:37 jgrad |
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VHDL
(RSS)
Discussion board for general VHDL questions and issues Moderator: jamesstine jgrad |
4 | 6 | 2008/4/5 16:26 don |
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Synthesis
(RSS)
A discussion board for general questions related to logic synthesis Moderator: jamesstine jgrad |
3 | 5 | 2006/5/1 11:59 ebrunvand |
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5 | 8 | 2008/4/7 11:36 gte558w |
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