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    <title>www.chiptalk.org :: Forum</title>
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      <title>Moncler V 2011 invernale a partire nuovi prima esposizione [by ]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=451&amp;forum=2</link>
      <description>Cadence:: Moncler V 2011 invernale a partire nuovi prima esposizione&lt;br /&gt;
Moncler, per decenni è stata l&amp;#039;arrampicata e sci in Europa e in America che sono i marchi più popolari all&amp;#039;aperto. Dal 1952 in poi, hanno cominciato qualità costruttiva è vestito buono e funzionale, in una collaborazione con Moncler, VISVIM la gente ragione principale di questo marchio secolo villaggio europee e americane di comprensione dello stile di produzione, e iniziò a progettare un nuovo co-brand Moncler V, che in questa stagione nel villaggio di beni selezionati su una serie di classici incisi passato Moncler vendere un singolo prodotto da fare. Gamma completa di merce sarà presto ufficialmente il debutto&lt;a href=&quot;http://www.moncler-longjackets.com/&quot; target=&quot;_blank&quot;&gt;&lt;b&gt;moncler uomo&lt;/b&gt;&lt;/a&gt;&lt;br /&gt;&lt;a href=&quot;http://www.moncler-longjackets.com/&quot; target=&quot;_blank&quot;&gt;&lt;b&gt;moncler vendita&lt;/b&gt;&lt;/a&gt;</description>
      <pubDate>Sat, 24 Sep 2011 20:13:00 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=451&amp;forum=2</guid>
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      <title>VT Cell Library Synthesis [by legolas]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=431&amp;forum=11</link>
      <description>NCSU CDK:: VT Cell Library Synthesis&lt;br /&gt;
Hi,&lt;br /&gt;&lt;br /&gt;Even though the Verilog code has always@(posedge) statements, it is getting synthesized into muxes and not latches.&lt;br /&gt;&lt;br /&gt;How to make sure they synthesize into latches.</description>
      <pubDate>Tue, 26 Jul 2011 13:30:58 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=431&amp;forum=11</guid>
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      <title>Re: Trouble with DRC in NCSU CDK 1.6.0 beta [by legolas]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=310&amp;forum=11</link>
      <description>NCSU CDK:: Trouble with DRC in NCSU CDK 1.6.0 beta&lt;br /&gt;
Hi,&lt;br /&gt;&lt;br /&gt;I was also unable to find the  *.rul files. They were linked to a non-existent location in the NCSU CDK 1.6 beta.&lt;br /&gt;&lt;br /&gt;The *.rul files are all in the &amp;#039;techfiles&amp;#039; folder. You have to link the files in all the other library directories to these files (using the ln-s command).</description>
      <pubDate>Thu, 21 Jul 2011 11:29:14 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=310&amp;forum=11</guid>
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      <title>Re: DRC Failure in Cadence [by legolas]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=429&amp;forum=2</link>
      <description>Cadence:: DRC Failure in Cadence&lt;br /&gt;
Hi,&lt;br /&gt;&lt;br /&gt;I contacted cadence with the problem.&lt;br /&gt;&lt;br /&gt;Diva licenses are not available in university packages anymore for Cadence Virtuoso version 6.1.4 and later.</description>
      <pubDate>Wed, 20 Jul 2011 22:30:14 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=429&amp;forum=2</guid>
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      <title>Re: Cell library not working right? [by mcjohnso]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=12&amp;forum=5</link>
      <description>OSU Cell Library:: Cell library not working right?&lt;br /&gt;
Is there some way to either take advantage of DC topological mode (requires Milkyway database) or at least use a reasonable wireload model? I can&amp;#039;t tell that there is support for either one in the OSU v2.7 flow. &lt;br /&gt;&lt;br /&gt;thanks&lt;br /&gt;&lt;br /&gt;Mark</description>
      <pubDate>Fri, 15 Jul 2011 09:32:07 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=12&amp;forum=5</guid>
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      <title>Re: CDB2OA in Cadence for VT Cell Libraries [by legolas]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=427&amp;forum=11</link>
      <description>NCSU CDK:: CDB2OA in Cadence for VT Cell Libraries&lt;br /&gt;
I think I have been able to resolve the issue for now.&lt;br /&gt;&lt;br /&gt;The steps to do the same are following:&lt;br /&gt;&lt;br /&gt;Create a separate folder say convert:&lt;br /&gt;&lt;br /&gt;&amp;gt; mkdir convert&lt;br /&gt;&amp;gt; cd convert&lt;br /&gt;&amp;gt; mkdir cdb&lt;br /&gt;&amp;gt; cd cdb&lt;br /&gt;&amp;gt; vi cds.lib &lt;br /&gt;&lt;br /&gt;Copy the contents of your previous cds.lib. This cds.lib must also have paths to the NCSU Library that the vtvt standard cell library requires.&lt;br /&gt;&lt;br /&gt;&amp;gt; cd .. (Come back to the convert directory)&lt;br /&gt;&lt;br /&gt;Now in CIW-&amp;gt;Tools-&amp;gt;Conversion Tool Box-&amp;gt;CDB TO Open Access ...&lt;br /&gt;&lt;br /&gt;It will ask for a cds.lib, give the path of the cds.lib present in directory cdb.&lt;br /&gt;&lt;br /&gt;The contents to convert are the vt standard cell libraries as well the NCSU library that these refer to.&lt;br /&gt;&lt;br /&gt;If the above steps are followed the error in the previous post will not figure up.</description>
      <pubDate>Fri, 15 Jul 2011 00:15:38 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=427&amp;forum=11</guid>
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      <title>Scan Cells [by sampham]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=426&amp;forum=7</link>
      <description>Synopsys:: Scan Cells&lt;br /&gt;
Hi,&lt;br /&gt;&lt;br /&gt;I am using Synopsys DC to insert a scan chain into a circuit that I want to test in Tetramax. I was able to have Verilog code written to implement the circuit with a scan chain, but do not have any libraries with scan cell definitions so I cannot run it through Tetramax.&lt;br /&gt;&lt;br /&gt;Where can I download a library with scan cells? And once I get the library how do I utilize it so that I can test my circuit in Tetramax?&lt;br /&gt;&lt;br /&gt;Thanks!</description>
      <pubDate>Wed, 13 Jul 2011 08:48:41 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=426&amp;forum=7</guid>
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      <title>Re: NCSU CDK 1.6beta, IC v6.1.4, and Spectre simulation with ADE? [by legolas]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=405&amp;forum=11</link>
      <description>NCSU CDK:: NCSU CDK 1.6beta, IC v6.1.4, and Spectre simulation with ADE?&lt;br /&gt;
Hi,&lt;br /&gt;&lt;br /&gt;I am trying to use the NCSU CDK 1.6 beta with the VTVT kit for digital design.&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;The VTVT kit asks to copy a divaDRC.rul file in the NCSU kit.&lt;br /&gt;but when I checked in NCSU kit library files all the .rul files such as divaDRC.rul files are marked in red and seem to be corrupted, they cannot be replaced.&lt;br /&gt;&lt;br /&gt;when I run the following command&lt;br /&gt;&amp;gt; ll *.rul&lt;br /&gt;lrwxrwxrwx 1 3339 108 49 Jul  9 16:01 divaDRC.rul -&amp;gt; /local/home/wdavis/NCSU_CDK//techfile/divaDRC.rul&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;What should I do about this?</description>
      <pubDate>Wed, 13 Jul 2011 01:30:22 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=405&amp;forum=11</guid>
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      <title>Re: getting a FAB&#039;s PDK [by Mashhood]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=424&amp;forum=12</link>
      <description>Commercial PDK:: getting a FAB&#039;s PDK&lt;br /&gt;
somebody please tell me this! has no one gone through this experience?</description>
      <pubDate>Tue, 5 Jul 2011 15:50:18 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=424&amp;forum=12</guid>
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      <title>Re: NSCU CDK vs foundry PDK [by wrdavis]</title>
      <link>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=423&amp;forum=11</link>
      <description>NCSU CDK:: NSCU CDK vs foundry PDK&lt;br /&gt;
That depends.  The NCSU CDK is a PDK based on the old lambda rules developed by Carver Mead and Lin Conway in the late 70&amp;#039;s.  These rules were accepted by many foundries, but fell out of fashion after the 180nm node.  So, the answer is yes, but restricted to the 180nm node and larger and only for foundries that accept them.  MOSIS still accepts GDSII designed with these rules for the 180nm node and larger technologies.</description>
      <pubDate>Thu, 23 Jun 2011 07:03:30 -0500</pubDate>
      <guid>http://www.chiptalk.org/modules/newbb/viewtopic.php?topic_id=423&amp;forum=11</guid>
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