| Topics | Forum | Replies | Poster | Views | Date | ||
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Parasitic capacitances in BSIM Model | Cadence | 0 | MohEllayal | 74 | 3/2 11:50:18 by MohEllayal |
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Magic and FreePDK 45nm | Magic | 0 | Leandro | 152 | 2/9 9:27:20 by Leandro |
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Cannot extract netlist from schematic or layout in Cadence 6.1 | NCSU CDK | 0 | kochungt | 220 | 1/27 18:38:13 by kochungt |
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Layout XL issue | NCSU CDK | 0 | icman | 478 | 2009/12/7 3:28 by icman |
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