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Author: J. Grad (Hits 6721)
Cadence Signalstorm is a popular tool to perform timing characterization for standard cell libraries.
Files: 0 Comments: 532
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Author: J. Grad (Hits 9729)
OpenAccess 2.2 is the next generation design database for EDA flows. OA22 is the sucessor of OA20. It includes full logical netlist data, making a separate gate level Verilog netlist obsolete. This tutorial shows Virtuoso - Encounter interoperability using OA22. This requires ICOA52-51 and SOCE 4.2.
Files: 0 Comments: 1059
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Author: J. Grad (Hits 5423)
The Cadence Encounter Flow Management System (FMS) provides a graphical interface to the complete Encounter design flow. The flow is structured in steps, each of which can be turned on or off and repeat or skipped. Results are gathered from each completed step. Requires Cadence SOC Encounter 4.2.
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Author: J. Grad (Hits 6261)
OpenAccess is the new central database for EDA design flows. It replaces both GDSII and DEF. This tutorial shows how to convert existing designs to OpenAccess and how to access the central data from Cadence Virtuoso and Cadence Encounter.
Files: 0 Comments: 570
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Author: J. Grad (Hits 8609)
A tutorial for Conformal, a formal equivalence checker. Provides a step-by-step guide on how to compare a gate-level netlist to an RTL netlist.
Files: 0 Comments: 1023
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Author: J. Grad (Hits 4832)
Describes the dynamic power analysis flow using Cadence Encounter. A VCD file from gate-level simulation provides simulation vectors for power analysis.
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Author: J. Grad (Hits 12560)
Cadence First Encounter and Cademce SOC Encounter are complete platforms for cell based digital design. This Tutorial describes the basic flow from netlist to routed layout. Also covers floorplanning, timing optimization and timing analysis.
Files: 0 Comments: 553
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